Course ID: EE1102
Course Credits: 4
Course Type: Foundation
Pre-requisites: EE1101 - Electronic Systems Thinking and Circuits
Course ID: EE1102
Course Credits: 4
Course Type: Foundation
Pre-requisites: EE1101 - Electronic Systems Thinking and Circuits
What you’ll learnVIEW COURSE VIDEOS
Course structure & Assessments
4 credit course, weekly online assignments, 2 in-person invigilated quizzes, 1 in-person invigilated end term exam. For details of standard course structure and assessments, visit Academics page.
| WEEK 1 | Introduction to digital systems; logic representation, voltage transfer characteristics, and reliable logic design. |
| WEEK 2 | Number systems and digital representations; binary, octal, hexadecimal, and signed number formats. |
| WEEK 3 | Boolean logic fundamentals; logic gates, truth tables, and Boolean algebra. |
| WEEK 4 | Boolean simplification and logic optimization; canonical forms and efficient circuit implementation. |
| WEEK 5 | Karnaugh maps and combinational logic design. |
| WEEK 6 | Logic implementation techniques; universal gates, multiplexers, decoders, and timing analysis. |
| WEEK 7 | Hierarchical digital design using decoders, multiplexers, encoders, and tri-state logic. |
| WEEK 8 | Functional digital building blocks; arithmetic circuits, comparators, and lookup-table based logic. |
| WEEK 9 | Sequential circuits; latches, flip-flops, counters, and timing behavior. |
| WEEK 10 | Registers, shift registers, and advanced flip-flop based circuit design. |
| WEEK 11 | Finite State Machines (FSMs); analysis and design using different flip-flop architectures. |
| WEEK 12 | Counter design, pipelining, timing optimization, asynchronous circuits, and error correction techniques including Hamming codes. |
Prescribed Books
The following are the suggested books for the course:
Digital Logic and Computer Design, M. Mano, 2004
Digital Design and Computer Architecture, Harris and Harris, MK 2013
About the Instructors
Prof. Janakiraman Viraraghavan is an Assistant Professor at the Department of Electrical Engineering, IIT Madras and is part of the Integrated Circuits and Systems (iCS) group. His research interests include porting machine-learning algorithms on to hardware and statistical analysis in VLSI. He also has a keen interest in Microprocessors and Programming in general.
Other courses by the same instructor: EE1101 - Electronic Systems Thinking and Circuits and EE2103 - Digital System Design
He is an Assistant Professor in the Integrated Circuits and Systems Group of the Department of Electrical Engineering, IIT Madras. His primary research interests are in Electronic Design Automation (EDA) Algorithms, with a specific focus on automating the Back End of Line (BEOL) flow for custom digital and analog/mixed-signal (AMS) designs.
He was involved in the development of the AMS placer and router in ALIGN, an open-source layout generator. During his stint at Synopsys after completing his PhD, he developed various tools for BEOL automation that are now state-of-the-art and are part of the Custom Compiler platform.
His recent research interests include mapping NP-hard/complete problems to Ising machines and exploring techniques such as Satisfiability Modulo Theory (SMT) for solving layout generation problems.